Experiment Session 2 for digital circuit

1. Logic Gates

7408 (labelled HD74LS08P) quadruple 2-input AND gates

7400 (labelled HD74LS00P) quadruple 2-input NAND gates
7432 (labelled HD74LS32P) quadruple 2-input OR gates

2. EXPERIMENT 1 – Half Adder

Table 1: The truth table of half adder

In Table 1, A and B are the two inputs of half adder, and S and C are the two outputs of half adder, S is the sum bit and C is the carry bit.

From the Table 1, we can get Boolean algebra of half adder

If only NAND gate is available, we should change the form of the Boolean algebra as follows

And then, we can get block diagram of half adder.

Half adder: Block diagram and NAND implementation

3. EXPERIMENT 2 – Full Adder

Full adder built from 2 Half Adders: Block diagram

4 Experiment Lecture

Click here to download experiment lecture (format: .docx)

Click here to download experiment lecture (format: .pdf)

5 Experiment Report

Click her to download experiment report template (foramt: .docx)

Finish the following questions:

  • Required Questions:

Question 2.1

Question 4.1.1 Attention: The circuit diagram refers to a diagram that contains 7400 ICs, connections between pins and wires. That means how to implement a Half Adder using workbench which you did in the laboratory.

Question 4.2.1 Attention: The same as Question 4.1.1.

  • Optional Questions:

Question 4.1.2

Question 4.1.3

6 Report Format and Deadline

  • Report Format: electrical document, .doc/.docx/.pdf will be OK.
  • Deadline: Before the end of this semester.
  • Mailbox: chengkaiupc@163.com

Attention: You would get zero for your experiment if you didn’t send the report to me before the deadline or to the right mailbox.

7 Contact Me

If you have any question, please leave a message below this passage or send me an email, I will be pleasure to help you.




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6 − 2 =

2 + = 11